Faculty Publications - Carlo H. Séquin

Books

  • C. H. Séquin, Ed., VLSI 87: VLSI Design of Digital Systems, Amsterdam: Elsevier Science Publishers, 1988. [abstract]
  • P. G. Jespers, C. H. Séquin, and F. V. D. Wiele, Eds., Design Methodologies for VLSI Circuits, NATO Advanced Study Institutes Series. Series E: Applied Sciences, No. 47, Rockville, MD: Sijthoff & Noordhoff, 1982. [abstract]
  • C. H. Séquin and M. F. Tompsett, Charge Transfer Devices, Advances in Electronics and Electron Physics: Supplement 8, New York, NY: Academic Press, 1975. [abstract]

Book chapters or sections

  • S. R. Burgett, R. T. Bush, S. S. Sastry, and C. H. Séquin, "Mechanical design synthesis from sparse, feature-based input," in Smart Structures and Materials 1995: Mathematics and Control in Smart Structures, V. V. Varadan, Ed., Proceedings of SPIE, Vol. 2442, Bellingham, WA: SPIE -- Society of Photo-Optical Instrumentation Engineeers, 1995, pp. 280-291.
  • M. G. H. Katevenis, C. H. Séquin, D. A. Patterson, and R. W. Sherburne, "RISC: Effective Architectures for VLSI Computers," in VLSI Electronics: Microstructure Science -- VLSI Design, N. G. Einspruch, Ed., Vol. 14, New York: Academic Press, 1986, pp. 35-79.
  • D. A. Patterson and C. H. Séquin, "Design Considerations for Single-Chip Computers of the Future," in Advanced Microprocessors, A. Gupta and H. Toong, Eds., I ed., IEEE Press, 1983, pp. 269-276.
  • C. H. Séquin and A. R. Newton, "Appendix: Description of STIF 1.0," in Design Methodologies for VLSI Circuits, P. G. Jespers, C. H. Séquin, and F. van de Wiele, Eds., NATO Advanced Study Institute. Series E: Applied Sciences, Vol. 47, Alpen aan den Rijn, Netherland: Sijthoff & Noordhoff, 1982, pp. 147-171.

Articles in journals or magazines

  • J. Andrews, H. Jin, and C. H. Séquin, "Interactive Inverse 3D Modeling," Computer Aided Design and Applications, vol. 9, no. 6, June 2012. [abstract]
  • C. H. Séquin, "Computer-aided design and realization of geometrical sculptures," Computer-Aided Design & Applications, vol. 4, no. 5, pp. 671-681, 2007.
  • P. Joshi and C. H. Séquin, "Energy minimizers for curvature-based surface functionals (2007 Best Student Paper Award)," Computer-Aided Design & Applications, vol. 4, no. 5, pp. 607-617, 2007.
  • T. A. Funkhouser, S. J. Teller, C. H. Séquin, and D. Khorramabadi, "UCB system for interactive visualization of large architectural models," Presence: Teleoperators & Virtual Environments, vol. 5, no. 1, pp. 13-44, Dec. 1995.
  • H. P. Moreton and C. H. Séquin, "Functional optimization for fair surface design," Computer Graphics, vol. 26, no. 2, pp. 167-176, July 1992.
  • A. R. Newton and C. H. Séquin, "Siemens and U.C. Berkeley: Partners in a technology adventure," Siemens Review, vol. SI, pp. 4-7, 1990. [abstract]
  • C. H. Séquin and A. R. Newton, "Die evolution des CAD fur das IC-design," Siemens Zeitschrift, pp. 4-7, 1990.
  • H. Y. Koh, C. H. Séquin, and P. R. Gray, "OPASYN: A compiler for CMOS operational amplifiers," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 9, no. 2, pp. 113-125, Feb. 1990.
  • M. Katevenis, C. H. Séquin, D. A. Patterson, and R. Sherburne, "RISC: effective architectures for VLSI computers," VLSI design, vol. 14, pp. 35-79, 1986.
  • C. H. Séquin and D. A. Patterson, "RISC: New Microcomputer Architecture Concept Implemented in Silicon by EECS," Highlights in EECS,EECS/ERL Research Summary, 1982.
  • D. A. Patterson and C. H. Séquin, "A VLSI RISC," Computer, vol. 15, no. 9, pp. 8-21, Sep. 1982.
  • D. Fitzpatrick, J. Foderaro, M. Katevenis, H. Landman, D. A. Patterson, J. Peek, Z. Peshkess, C. H. Séquin, R. Sherburne, and K. Van Dyke, "A RISCy Approach to VLSI," Computer Architecture News, vol. 10, no. 2, pp. 28-32, April 1982. [abstract]
  • D. Fitzpatrick, J. Foderaro, M. Katevenis, H. Landman, D. A. Patterson, J. Peek, C. Peshkess, C. H. Séquin, R. Sherburne, and K. Van Dyke, "A RISCy Approach to VLSI," VLSI Design, Nov. 1981. [abstract]
  • A. R. Newton, D. O. Pederson, A. L. Sangiovanni-Vincentelli, and C. H. Séquin, "Design aids for VLSI: The Berkeley perspective (Invited Paper)," IEEE Trans. Circuits and Systems, vol. 28, no. 7, pp. 666-680, July 1981.
  • D. A. Patterson and C. H. Séquin, "RISCy Course Sequence Creates RISCy Microcomputer," Forefront, pp. 14-18, 1980.
  • D. A. Patterson and C. H. Séquin, "Design Considerations for Single-Chip Computers of the Future," IEEE Transactions on Computers, vol. 29, no. 2, pp. 108-116, Feb. 1980. [abstract]
  • D. A. Patterson and C. H. Séquin, "Design Considerations for Single-Chip Computers of the Future," IEEE Journal of Solid-State Circuits, vol. 15, no. 1, pp. 44-52, Feb. 1980. [abstract]

Articles in conference proceedings

  • C. H. Séquin, "Intricate isohedral tilings of 3D Euclidean space," in Proc. 11th Annual Bridges Conf. on Mathematical Connections in Art, Music, and Science (Bridges 2008), R. Sarhangi and C. H. Séquin, Eds., The Bridges Organization, 2008, pp. 10 pg.
  • C. H. Séquin, "Art and math behind and beyond the 8-fold way," in Proc. Gathering for Gardner (G4G8), Atlanta, GA: The Gathering for Gardner Foundation, 2008, pp. 6 pg.
  • R. Levien and C. H. Séquin, "Eureka: Euler spiral splines (Poster)," in Proc. 2007 ACM Intl. Conf. on Computer Graphics and Interactive Techniques (SIGGRAPH '07), New York, NY: The Association for Computing Machinery, Inc., 2007, pp. Art. 16.
  • C. H. Séquin and J. F. Hamlin, "The regular 4-dimensional 57-cell (Sketches)," in Proc. 2007 ACM Intl. Conf. on Computer Graphics and Interactive Techniques (SIGGRAPH '07), New York, NY: The Association for Computing Machinery, Inc., 2007, pp. Art. 3.
  • C. H. Séquin, "Symmetric embedding of locally regular hyperbolic tilings," in Proc. 10th Annual Bridges Conf. on Mathematical Connections in Art, Music, and Science (Bridges 2007), R. Sarhangi and J. Barallo, Eds., Waterloo, Canada: The Bridges Organization, 2007, pp. 10 pg.
  • D. Garmire, H. Choo, R. Kant, S. govindjee, C. H. Séquin, R. S. Muller, and J. Demmel, "Diamagnetically levitated MEMS accelerometers (Poster Paper)," in 14th IEEE Intl. Conf. on Solid-State Sensors, Actuators and Microsystems (TRANSDUCERS 2007) Digest of Technical Papers, Piscataway, NJ: IEEE Press, 2007, pp. 1203-1206.
  • C. H. Séquin, "Designing Sculptures with Sculpture Generator (Workshop Abstract)," in Proc. 6th Interdisciplinary Conf. of The International Society of the Arts, Mathematics, and Architecture (ISAMA 2007), E. Akleman and N. Friedman, Eds., The International Society of the Arts, Mathematics, and Architecture, 2007, pp. 217-218.
  • C. H. Séquin and J. Lanier, "Hyperseeing the regular hendecachoron," in Proc. 6th Interdisciplinary Conf. of The Intl. Society of the Arts, Mathematics, and Architecture (ISAMA 2007), E. Akleman and N. Friedman, Eds., The International Society of the Arts, Mathematics, and Architecture, 2007, pp. 161-168.
  • B. Collins, S. Reinmuth, and C. H. Séquin, "Design and implementation of Pax Mundi II," in Proc. 6th Interdisciplinary Conf. of The Intl. Society of the Arts, Mathematics, and Architecture (ISAMA 2007), E. Akleman and N. Friedman, Eds., The International Society of the Arts, Mathematics, and Architecture, 2007, pp. 11-20.
  • S. McMains, J. M. Hellerstein, and C. H. Séquin, "Out-of-core build of a topological data structure from polygon soup," in Proc. 6th ACM Symp. on Solid Modeling and Applications (SMA '01), K. Lee and D. C. Anderson, Eds., New York, NY: The Association for Computing Machinery, Inc., 2001, pp. 171-182.
  • C. H. Séquin, A. L. Sangiovanni-Vincentelli, and A. R. Newton, "The Berkeley Synthesis Project [VLSI]," in 1987 Symp. on VLSI Circuits. Digest of Technical Papers, Piscataway, NJ: IEEE, 1987, pp. 1-4. [abstract]
  • C. H. Séquin, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Highlights of VLSI research at Berkeley," in 1986 Proc. Fall Joint Computer Conf. (FJCC-86), H. S. Stone, Ed., Washington, DC: IEEE Computer Society Press, 1986, pp. 894-898.
  • M. Katevenis, R. Sherburne, C. H. Séquin, and D. A. Patterson, "A 32b NMOS Microprocessor with a Large Register File," in Proceedings of the 31st International Solid States Circuit Conference, ISSCC Digest of Technical Papers, IEEE, 1984, pp. 168-169. [abstract]
  • R. Sherburne, M. Katevenis, D. A. Patterson, and C. H. Séquin, "Local memory in RISCs," in Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers, ICCD, Port Chester, NY: IEEE Computer Society, 1983, pp. 149-52.
  • M. Katevenis, R. Sherburne, C. H. Séquin, and D. A. Patterson, "The RISC II Micro-Architecture," in Proceedings of the VLSI 83 Conference, 1983.
  • C. H. Séquin and D. A. Patterson, "Design and Implementation of RISC I," in Proceedings of the Advanced Course on VLSI Architecture, 1982.
  • S. A. Ellis, K. H. Keller, A. R. Newton, D. O. Pederson, A. L. Sangiovanni-Vincentelli, and C. H. Séquin, "A symbolic layout design system," in Proc. 1982 IEEE Symp. on Circuits and Systems (ISCAS-82), New York, NY: IEEE, 1982, pp. 670-676. [abstract]
  • M. Katevenis, C. H. Séquin, and D. A. Patterson, "Datapath Design for RISC," in Proceedings of Conference on Advanced Research in VLSI, 1982.
  • D. Fitzpatrick, J. Foderaro, M. Katevenis, D. A. Patterson, H. Landman, J. Peek, Z. Peshkess, C. H. Séquin, R. Sherburne, and K. Van Dyke, "VLSI Implementations of a Reduced Instruction Set Computer," in Proceedings of the CMU Conference on VLSI Systems and Computations, VLSI Systems and Computations, 1981. [abstract]
  • D. A. Patterson and C. H. Séquin, "RISC I: A Reduced Instruction Set VLSI Computer," in Proc. 8th Intl. Symp. on Computer Architecture, Los Alamitos, CA: IEEE Computer Society Press, 1981, pp. 443-457.
  • D. A. Patterson, E. Fehr, and C. H. Séquin, "Design Considerations for the VLSI Processor of X-TREE," in Proceedings of the 6th annual symposium on Computer architecture, ISCA, New York, NY: ACM, 1979, pp. 90-101. [abstract]
  • C. H. Séquin, A. Despain, and D. A. Patterson, "Communication in X-TREE, a Modular Multiprocessor System," in Proceedings of the 1978 annual ACM National Conference, New York, NY: ACM, 1978, pp. 194-203. [abstract]

Technical Reports

Software

Patents

Masters Reports