Lower-level Protocol Choices
Who supplies data on miss when not in M state: memory or cache?
- Original, lllinois MESI: cache, since assumed faster than memory
- Not true in modern systems
- Intervening in another cache more expensive than getting from memory
Cache-to-cache sharing adds complexity
- How does memory know it should supply data (must wait for caches)
- Selection algorithm if multiple caches have valid data
Valuable for cache-coherent machines with distributed memory
- May be cheaper to obtain from nearby cache than distant memory, Especially when constructed out of SMP nodes (Stanford DASH)