CS 252 Project Proposal: Modeling
Memory Systems Using Communication-Based Design
Members: Doug Densmore & Donald
Chai
Mentor: Trevor Meyerowitz
The
purpose of this project is to investigate applying the ideas of
communication-based design to the functional and architectural modeling of a
microprocessor memory system at different levels of abstraction. This modeling will be in the SystemC
language while leveraging concepts from the Metropolis design framework. The
results of this investigation will compared with current approaches in terms of
modeling performance, ease of modeling, connection to implementation,
retargetability, and reusability.
Traditional
microprocessor design flow goes through a vertical design process from chip
architects (writing C models), designers (writing register transfer level
code), circuit designers (developing circuit diagrams), and finally layout
(polygon pushers). At each stage the code from the previous stage is rewritten
and compared with that of the previous stage.
This is often an error prone, tedious, and redundant process. In
addition, it lends itself to iterative verification and testing stages as well.
Ideally a common model should be used throughout design process. Our approach will help bridge the gap
between chip architects and designers to increase productivity and correctness
of the design much earlier and more easily in the design flow.
Previous
approaches have modeled memory systems at a single level of abstraction and
often in an ad hoc manner. As
mentioned, to form the methodology for this process, we will follow the
Metropolis design philosophy. Metropolis is a design environment for heterogeneous
systems based upon a meta-model of computation that separates computation,
communication, and coordination. This
is in the spirit of communication-based design which emphasizes this
orthogonalization of concerns and separating function from architecture. In addition, it focuses on reusability,
retargetability, and applying formalisms to the system design process.
In
order to model this system, we needed to select a modeling language that would
be at an appropriate level of abstraction as well as tie in with current work
here at Berkeley. SystemC is a collection of C++ libraries that can model
hardware and software systems at different levels of abstraction. It was
developed at Synopsys and is now fast becoming a widely used modeling language
due to its availability (tools and support), simulation speed, and abstraction
level (above HDLs, below traditional C/C++).
Our
motivating example is a subset of the MIPS32 instruction set. We will be
connecting with previous work on processor modeling. The current modeling will
use our memory system to more fully realize the MIPS architecture. It will
include such features as register file, memory hierarchy, memory control, and
details configuring memory performance.
Keeping with our goals, our memory work should be general enough to be
reusable. We hope to come up with primitives useful for modeling a wide variety
of memory systems. Hopefully, the
methodology employed by the Metropolis meta-model along with the modeling tools
of SystemC will aid in refining and synthesizing the models. The success of
this procedure would be evaluated in terms of reusability, simulation
performance and connection to implementation.
Sources:
“Metropolis:
Design Environment for Heterogeneous Systems”, http://www.gigascale.org/metropolis/ - This is the metropolis
webpage which describes the metropolis design framework, which applies the
ideas of communication based design.
M.Chiodo
et al, “A Formal Methodology for Hardware/Software Co-Design of Embedded
Systems,” IEEE Micro, August 1994, pp. 26-36. – Prior work that lead to the metropolis
project.
S.
Swan, “An Introduction to System Level Modeling in SystemC 2.0,” Cadence Design
Systems, Inc., draft report, May 2001. – Introduction and examples to begin thinking about
modeling in SystemC.
"SystemC
2.0 User Guide", http://www.SystemC.org – Official SystemC website.
Burger,
D.; Austin, T.M. The SimpleScalar tool set, version 2.0. Computer Architecture News,
vol.25, (no.3), ACM, June 1997. p.13-25.- One of the most popular processor simulators.
Sugumar,
R.A.; Abraham, S.G. “Efficient simulation of caches under optimal replacement
with applications to miss characterization.” Performance Evaluation
Review, vol.21, (no.1), (1993 ACM Sigmetrics Conference on Measurement and
Modeling of Computer Systems, Santa Clara, CA, USA, 17-21 May 1993.) June 1993.
p.24-35. - Cache simulation work
used by the SimpleScalar simulator