Dr. Laurent El Ghauoi is very interested in making decisions that can be backed up by hard data. Unfortunately (?), data isn't always completely certain. Measurement and systemic errors exist in real life, and few mathematical optimization methods account for uncertainty. Those that find robust solutions, including semidefinate programming, are NP-hard, at least. However, recent results make it possible to find bounds for the optimal parameters. Applying these techniques in controlling and modelling loosely connected systems will result in more reliable systems.
Currently, creating, managing, and storing masks is a huge expense for chip manufacturers. The wait for mask development and the tasking required to deploy them slows development. Maskless lithography enables vastly greater development flexibility, and can make custom microchips more attainable. Dr. William Oldham and Yashesh Shroff are developing a nanomirror array, and Yijian Chen (again, with Dr. Oldham) is developing a nanomirror control system. Combined, these advances should help achieve EUV maskless lithography. Getting enough data to the mirror system is another story.
George Necula wants secure, reliable, efficient, but extensible systems. He also doesn't want to be limited to extensions his trusted friends have written; he wants extensions from untrusted sources. He doesn't even want to consider who is sending him code; he wants to treat friends and adversaries equally. Hence, he won't install foreign code unless it carries a proof that it's ok. The proof need only be verified once. After verification, the code can run at full speed. At present, properties which can be encoded easily in first-order logic can be proven from the source or from slightly annotated assembler code. While there are theoretical limitations on proving non-trivial properties, quite a few useful properties seem to yield to this technique.
The ISTORE project is investigating intelligent, self-managing storage. The increasing demand for more, and more accessible, storage is outstripping administration abilities. Disks fail. Networks become clogged. No human administrator can possibly manage all the variables all the time, but the users need that level of management. One aspect of the ISTORE project is to examine reactive and proactive self-maintenance.
The creation of sub-micron-scale gates is another enabling technology being explored. Smaller gates can enable more integration on a single chip, smaller chips, and less power consumption. This particular project also integrated small RF devices on chip. Fully integrating processing, memory, and communication on the chip level can lead to serious advances in collaborating micro-electrical systems. This one also made the news.