Many AI tasks require extensive searching and processing within large data structures. Two example applications are semantic network processing [Higuchi et al. 1991], and maintaining hypothesis blackboards in a multi-agent knowledge-based system for speech understanding [Asanovic and Chapman1988]. Associative processors promise significant improvements in cost/performance for these data parallel AI applications [Foster1976,Lea1977,Kohonen1980]. SPACE is an associative processor architecture designed to allow experimentation with such applications.
A large SPACE array has been built as part of the PADMAVATI project [Guichard-Jary1990]. The core of PADMAVATI is a MIMD transputer array, where each processor has a small amount of fast on-chip SRAM and a large bank of slower external DRAM. Each transputer acts as controller for a local SPACE array.
In this paper we first present the architecture of SPACE, then
describe its implementation within the PADMAVATI prototype. We also
present performance figures for a range of primitive operations before