Parthenon

CS252: Fall 98 Final Projects


12/8: 1:00 pm:
  An Examination of Data Set Size Dependence in Benchmarks
Erik Machnicki and Brian Etschied
Examined effect of varying data set size on some SPEC benchmarks. Looked at charactersistics of benchmarks that make them (un)scalable.

12/8: 1:20pm:
  BenchmarkLapack Performance On VIRAM Architecture
Yu-Han Chen and Hoi Yeung
In this project, we try to evaluate VIRAM performance for large scientific applications. We have implemented the LU decomposition and QR decomposition algorithms of Lapack package. To take advantage of VIRAM vector processor architecture, we implemented LU and QR decomposition using column elimination algorithm. Comparing with the published benchmark result, we show that VIRAM architecture can outperform a number of the fastest processors currently available.

12/8: 1:40pm:
  An efficient design of a hybrid load value predictor
Ioannis Mavroidis and Z. Morley Mao
We explored different alternatives to improve a baseline load value predictor by Lipasti et al. Modifications such as use of table associativity, address indexed 2-level table, and use of branch history information did not help significantly. Change of load classification FSM, use of context-based and stride-value schemes and the concurrent use of another predictor can increase correct predictions quite a lot, in some cases near 90%.

12/8: 2:00 pm:
  A framework for the automated discovery of predictors through genetic programming and its application to branch and data value prediction.
Sylvia Ratnasamy and José María González
Our project describes our work on the design and implementation of a framework that enables the search for new predictors through genetic programming and evaluation of the resultant solutions. We have applied this framework to the areas of branch and data value stride prediction.

12/8: 2:20 pm:
  An Efficient Implementation of Hybrid Data Value Predictor with Confidence Estimation
Shawn Chang, Flora X. Tian
Based on the ananysis of resource usage, a scheme to reduce hardware for data value prediction is proposed. With 40% less hardware, it achieved the same performance as the best existant predictor. With confidence estimation, misprediction rate is further reduced.

12/9: 1:00 pm:
  Architectures for Wideband CDMA Software Radios
Rhett Davis and Vandana Prabhu
A feasibility study for software radios. A multi-user detection algorithm has been mapped to the VIRAM and Pleiades architectures with real-time performance constraints and comparisons made.

12/9: 1:20 pm:
  Image Segmentation on IRAM
Dan Bonachea & Shree Prakash Rahul
We studied the Normalized Cuts algorithm for image segmentation and vectorized critical portions of the existing code so that it runs faster on IRAM.

12/9: 1:40 pm:
  Processor Characteristic Selection for Embedded Applications via Genetic Algorithms
Sharad Agarwal, Ed Chan, Ben Liblit, C.J. Lin
This work proposes a methodology for traversing the vast space of processor designs. By casting the search space into an evolutionary framework and by specifying a fitness metric, a genetic algorithm has been used to evolve the ideal superscalar microprocessor for a set of benchmarks.

12/9: 2:00 pm:
  Array Processor Architecture for a Low Power Adaptive Multiuser CDMA Receiver
Kostas Sarrigeorgidis
Design and simulation of an algorithm for low power adaptive multiuser CDMA receivers. Includes architecture design and evaluation of the proposed architecture; also includes Data flow computation, timing analysis, analysis of power consumption, and scaling issues to .1micro technology

12/9: 2:20 pm:
  PalmPilot Power Profiles
Danyel Fisher and James Lin
We have correlated power drain and energy consumption with certain PalmOS system calls. We have also created a basic infrastructure to trap and record system calls that are specified by the user, and export the data to a file on a PC.

12/9: 2:40 pm:
  ROE: Runtime Optimization Environment
Marat Boshernitsan, Alyosha Efros, David Oppenheimer
We have designed and implemented a hardware/software architecture for performing continuous runtime program optimization.

12/9: 3:00 pm:
  A Simple Energy Saving Scheme for PDA's Using Hardware Predicted DVS
Hayden So, Alec Woo
Due to its inherent low CPU utilization, handheld PDA type devices are excellent candidates for saving energy consumption using dynamic voltage scaling (DVS). By employing hardware predicted DVS, using branch prediction-like prediction scheme, we are able to lower energy consumption by 40% on average.

Maintained by Aaron Brown (abrown@cs.berkeley.edu). Last modified 19 September 1998.