Parthenon

CS252 Fall '99: List of papers handed out so far.


Here are the papers that you should have gotten in class so far:
 
Friday 9/3 
  • David Patterson and David Ditzel, "The Case for the Reduced Instruction Set Computer," ACM SIGARCH Computer Architecture News 8 (15 Oct 1980)
  • Douglas Clark and William Strecker, "Comments on 'The Case for the Reduced instruction Set Computer' by Patterson and Ditzel"  ACM SIGARCH Computer Architcture News 8 (15 Oct 1980)
  • Diefendorff, "Transistor Budgets Go Ballistic", Microprocessor Report , August 3, 1998
  • David Patterson and Carlo Sequin, "RISC I: A Reduced Instruction Set VLSI Computer", Proceedings of the International Symposium on Computer Architecture (ISCA) 1981.  See ISCA Retrospective
  • James Smith and Andrew Pleszkun, "Implementation of Precise Interrupts in Pipelined Processors", Proceedings of the International Symposium on Computer Architecture (ISCA) 1985. See ISCA Retrospective

Wednesday 9/8
  • Richard Russel, "The CRAY-1 Computer System", Communications of the ACM, 21(1) 63-72, January 1978
  • David Moon, "Symbolics Architecture", IEEE Computer, 1987
  • E. Hauck  and B. Dent, "Burroughs' B6500/B7500 stack Mechanism," AFIP SJCC, 1968
  • M. Wilkes and J. Stringer, "Micro-Programming and the Design of the Control Cicuits in an Electronic Digital Computer,"Proceedings of the Cambridge Philosophical Society,  pp 230-238, 1953
  • David Ditzel and David Patterson, "Retrospective on High-Level Computer Architecture" Proceedings of the International Symposium on Computer Architecture (ISCA) 1981.  See ISCA Retrospective

Friday 9/10
  • G. Amdahl, G. Blaauw, F. Brooks, Jr., "Architecture of the IBM System/360", IBM Journal, April 1964
  • Gurindar Sohi and Sriram Vajapeyam, "Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors", Proceedings of the International Symposium on Computer Architecture (ISCA) 1987.  See ISCA Retrospective
  • Wen-mei Hwu and Yale Patt, "HPSm, a High Performance Restricted Data Flow Architecture Having Minimal Functionality," Proceedings of the International Symposium on Computer Architecture (ISCA) 1986. See ISCA Retrospective
  • Jack Dennis and David Misunas, "A Preliminary Architecture for a Basic Data-Flow Processor", Proceedings of the International Symposium on Computer Architecture (ISCA) 1975.  See ISCA Retrospective
  • Gregory papadopoulos and David Culler, "Monsoon: an Explicit Token-Store Architecture", Proceedings of the International Symposium on Computer Architecture (ISCA) 1990.  See ISCA Retrospective

Wednesday 9/15
  • Allan Fisher and Anwar Ghuloum, "Parallelizing Complex Scans and Reductions", Proceedings of the Conference on Programming Language Design and Implementation, 1994
  • James Smith, "Decoupled Access/Execute Computer Architectures", Proceedings of the International Symposium on Computer Architectures (ISCA), 1982. See ISCA Retrospective
  • R. Tomasulo, "An Efficient Algorithm for Exploiting Multiple Arithmetic units", IBM Journal, January 1967
  • D. Anderson, F. Sparacio, and R. Tomasulo, "The IBM System/360 Model 91: Machine Philosophy and Instruction-Handling", IBM Journal, January 1967
  • Joseph Fisher and B. Ramakrishna Rau, "Instruction-level Parallel Processing", Science, 253:1233-1241, September 13, 1991
  • Robert Colwell, Robert Nix, John O'Donnel, David Papworth, and Paul Rodman, "A VLIW Architecture for a Trace Scheduling Compiler", IEEE Transactions on Computers, Vol 37, No. 8, August 1988
  • Joseph Fisher, "Very Long Instruction Word Architectures and the ELI-512", Proceedings of the International Symposium on Computer Architecture (ISCA), 1983. See ISCA Retrospective
  • Michael Smith, Mark horowitz, and Monica Lam, "Efficient Superscalar performance Through Boosting", Proceedings of the Symposium on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 1992

Wednesday 9/22

Friday 9/24

Friday 10/15
(Electronic Copies)

Friday 10/22
  • David Kroft, "Lockup-Free Instruction Fetch/Prefetch Cache Organization", Proceedings of the International Symposium on Computer Architecture (ISCA), 1981 See ISCA Retrospective
  • Normal Jouppi, "Improving Direct-mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch buffers". Proceedings of the International Symposium on Computer Architecture (ISCA), 1981 See ISCA Retrospective
  • Todd Mowry, Monica Lam, and Anoop Gupta, "Design and Evaluation of a Compiler Algorithm for Prefetching, Proceedings of the Symposium on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 1992
  • Anoop Gupta, John Hennessy, Kourosh Gharachorloo, todd Mowry, and Wolf-Dietrich Weber, "Comparative Evaluation of Latency Reducing and tolerating Techniques", Proceedings of the International Symposium on Computer Architecture (ISCA), 1991

Wednesday 10/27
  • B. Ramakrishna Rau, "Pseudo-Randomly Interleavaed Memory", Proceedings of the International Symposium on Computer Architecture (ISCA-18), 1991 
  • Subbarao Palacharla and R.E. Kessler, "Evaluating Stream Buffers as a Secondary Cache Replacement", Proceedings of the International Symposium on Computer Architecture (ISCA-21), 1994. 
  • Keith Farkas, Paul Chow, Norman Jouppi, and Zvonko Vranesic, "Memory-System Design Considerations for Dynamically-Scheduled Processors", Proceedings of the International Symposium on Computer Architecture (ISCA-24), 1997 

Friday 10/29
  • M. Y. Hsiao, "A Class of Optimal Minimum Odd-weight-column SC-DED Codes", IBM J. Res Develop, vol 14, no 4, July 1970
  • Shigeo Kaneda, "A Class of Odd-Weight-Column SEC-DED-SbED Codes for Memory System Applications", IEEE Transactions on computers, vol c-33, no 8, August 1984
  • Daniel Spielmann, "Linear-time encodable and decodable error-correcting codes", 27th Annual ACM Symposium on the Theory of Computing, 1996
  • Michael G. Luby, Michael Mitzenmacher, M. Amin Shokrollahi, Daniel A. Spielman, and Volker Stemann, "Practical Loss-Resilient Codes," 29th Annual ACM Symposium on the Theory of Computing, 1998
  • Brian Case, "Sun Makes MAJC With Mirrors", Microprocessor Report, October 25, 1999
  • A. Bensoussan, C.T. Clingen, and R.C. Daley, "The Multics Virtual Memory: Concepts and Design", Communications of the ACM", Vol 15, No 5, May 1972 

Friday 11/5
  • Thomas Anderson, Henry Levy, Brian Bershad, and Edward Lazowska, "The Interaction of Architecture and Operating System Design", Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). April 1991.
  • David patterson, Garth Gibson, and Randy Katz, "A Case for Redundant Arrays of Inexpensive Disks (RAID)," ACM SIGMOD conference, 1988
  • Mark Papmaroos and Janak Patel, "A Low-Overheaad Coherence Solution fro Multiprocessors with Private Cache Memories," Proceedings of the International Symposium on Computer Architecture (ISCA), 1984. See ISCA Retrospective
  • Michel Dubois, Chistoph Scheurich, and Faye Briggs, "Memory Access Buffering in Multiprocessors", Proceedings of the International Symposium on Computer Architecture (ISCA), 1984. See ISCA Retrospective

Wednesday 11/10
  • Wei C. Yen, David W.L. Yen, and King-Sun Fu, "Data Coherence Problem in a Multicache System," IEEE Transactions on Computers, Vol c-34 No. 1, January 1985.
  • Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip Gibbons, Anoop Gupta, and John Hennessy, "Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors," Proceedings of the International symposium on Computer Architecture, 1990.  See ISCA Retrospective
  • Mark D. Hill, "Multiprocessors Should Support Simple Memory-Consistency Models,"  IEEE Computer, August 1998
  • Chris Gniady, Babak Falsafi, and T.N. Vijaykumar, "Is SC + ILP = RC?", Proceedings of the International symposium on Computer Architecture, 1999

Friday 11/12
  • William Dally, Linda Chao, andrw Chien, Soha Hassoun, Waldemar horwat, Jon Kaplan, Paul Song, Brian Totty, and Scott Willis, "Architecture of a Message-Driven Processor, Proceedings of the International symposium on Computer Architecture, 1987.  See ISCA Retrospective
  • Anant Agarwal, Richard Simoni, John Hennessy, and Mark Horowitz, "An Evaluation of Directory Schemes for Cache Coherence," Proceedings of the International symposium on Computer Architecture, 1988.  See ISCA Retrospective
  • Thorsten von Eicken, David E. Culler, Seth Copen Goldstein, and Klaus Erik Schauser, "Active Messages: a Mechanism for integrated Communication and Computation," Proceedings of the International symposium on Computer Architecture, 1992.  See ISCA Retrospective
  • Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, and John Hennessy, "The DASH Prototype: Implementation and Performance," Proceedings of the International symposium on Computer Architecture, 1992.  See ISCA Retrospective
  • Anant Agarwal, Ricardo Bianchini, David Chaiken, Kirk L. Johnson, David Kranz, John Kubiatowicz, Beng-Hong Lim, Kenneth Mackenzie, and Donald yeung, "The MIT Alewife Machine: Architecture and Performance," Proceedings of the International symposium on Computer Architecture, 1995.  See ISCA Retrospective

Friday 11/19
  • Keith Diefendorff, "Hall Makes Sparcs Fly", Microprocessor Report, Vol 13, No 15, 1999
  • Sarita V. Adve and Mark Hill, "Weak Ordering - A New Definition", Proceedings of the International symposium on Computer Architecture, 1990. See ISCA Retrospective
  • L. Rodney Goke and G Lipovski, "Banyan Networks for Partitioning Multiprocessor Systems", Proceedings of the International symposium on Computer Architecture, 1974. See ISCA Retrospective
  • Daniel Linder and Jim Harden, "An Adaptive and Fault Tolerant Wormhole Routing Strategy for k-ary, n-cubes," IEEE Transactions on Computers, vol 40, No. 1, January 1991 

Friday 12/03
  • Leonard Adleman, "Molecular Computation of Solutions to Combinatorial Problems", Science Magazine, Vol 266, November 11, 1994
  • Manin, Yu. I., "Quantum Computing and Shor's Factoring Algorithm," Proceedings of the ESI conference on the Riemann Zeta Function, ?????
  • Artur Ekert and Richard Jozsa, "Shor's Quantum Algorithm for Factorising Numbers" Review of Modern Physics, Vol.68, No.3, pp.733-753, (July 1996).
  • K. Eric Drexler, "Nanomechanical Computational Systems", From: Nanosystems, Chapter 12, John Wiley & Sons, 1992
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Maintained by John Kubiatowicz (kubitron@cs.berkeley.edu). Last modified November 19, 1998.