Poster Session Locations for CS252, Spring 1998

Please refer to this map to see where the different areas are. Take the area you are assigned to as a rough guide to where you should set up your poster. Area A starts on the west lounge on the 6th floor (611); the letters progress to area G at the east lounge.
Area A Study of Quad Pentium Pro Behavior Under OLTP Workload and MS SQL Server DBMS Jonathan Kung, Megan Thomas
Optimizing a Multigrid Solver on Sequential Machines and SMPs Rich Vuduc, Michael Wittman
Architectural Analysis of SMP Systems for the NAS Parallel Benchmark Frederick Wong, David Wu
VIA Phil Buonadonna, Andy Geweke
Area B Network vs. Local Bus Ravi Gunturi, Mark Spiller
Very Large Scale Backup Adam Costello, Chris Umans, Felix Wu
Area C Cache Optimizations Carleton Miyamoto
Influence of Caches on the Performance of Algorithms Andris Ambainis, Alex Berg, Benjamin Diament
Area D Benchmarking PDAs Michael Downes, Adam Janin
P6: Project to Profile Pilot PDA Power and Performance Jason I. Hong, Mark Newman
Area E BDTI on ARM, MMX Hungchi Lee, Jian-jin Tuan
Speech on a Vector Architecture Dan Gildea
Area F Proposal for Pipelined, Low Power Tri-Multiplier implemented for VIRAM Cheol-Woong Lee, Norman Walker
TLB Design for VIRAM Omid Rowhani, Xiaoru Zhang
Area G INESL: NESL on IRAM Aaron Brown, David Oppenheimer
Porting BDTI Benchmarks to a Vector Processor Haiyun Tang, Ning Zhang
CELP Speech Coding on VIRAM Heyning Cheng, Eugene Teh
Estimating the Multimedia Capabilities of IRAM through MPEG Encoding/Decoding Nathan Slingerland, Kirby Zhang