This course is senior level computer design course where students
design a pipelined MIPS processor and cache from a schematics library
and control in VHDL. These designs are simulated using a Powerview CAD
program and hence are validated by running real programs.This project
is done in large groups of 4 to 5 students to give students the
experience of having to be successful by working with others versus
working individually. They are given the chance to do extra credit of
their own choosing. They must give a 25 minute oral permutation as
well as a written report at the end of the course.

X was perceived to be a valuable member of the project by
his partners, and the received an A+ on their oral presentation, an A+
on the written report, and an A on the project design.

X received an A+ overall, ranking first out of a class of
67. He is an exceptional student, both in terms of his performance in
my class and in discussions with him outside of class.

Beyond CS 152, X has done independent research on my
project, and has shown that he can work well in a team.
Overall, he maintained a 4.0 GPA, will graduate in four years, and has a
double major in EECS and Physics. I think he has the potential to be a
superstar graduate student in any program.