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K. Datta, S. Kamil, S. Williams, L. Oliker, J. Shalf, K. Yelick,
"Optimization and Performance Modeling of Stencil Computations on Modern Microprocessors",
SIAM Review (SIREV) (to appear), 2008.
[pdf]
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K. Datta, M. Murphy, V. Volkov, S. Williams, J. Carter, L. Oliker, D. Patterson, J. Shalf, K. Yelick,
"Stencil Computation Optimization and Autotuning on State-of-the-Art Multicore Architectures",
Supercomputing (SC) (to appear), 2008.
[pdf]
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S. Williams, K. Datta, J. Carter, L. Oliker, J. Shalf, K. Yelick, D. Bailey,
"PERI: Auto-tuning Memory Intensive Kernels for Multicore",
SciDAC PI conference, Journal of Physics: Conference Series (to appear), 2008.
[pdf]
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S. Williams, J. Carter, L. Oliker, J. Shalf, K. Yelick,
"Lattice Boltzmann Simulation Optimization on Leading Multicore Platforms",
International Parallel & Distributed Processing Symposium (IPDPS), 2008.
WINNER: Best paper, applications track
[pdf]
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S. Williams, L. Oliker, R. Vuduc, J. Shalf, K. Yelick, J. Demmel,
"Optimization of Sparse Matrix-Vector Multiplication on Emerging Multicore Platforms",
Supercomputing (SC), 2007.
[pdf]
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S. Williams, J. Shalf, L. Oliker, S. Kamil, P. Husbands, K. Yelick,
"Scientific Computing Kernels on the Cell Processor",
International Journal of Parallel Programming (IJPP), 2007.
[pdf]
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K. Asanovic, R. Bodik, B. Catanzaro, J. Gebis, P. Husbands, K. Keutzer, D. Patterson, W. Plishker, J. Shalf, S. Williams, K. Yelick,
"The Landscape of Parallel Computing Research: A View from Berkeley",
UCB Technical Paper, 2006.
[pdf]
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S. Kamil, K. Datta, S. Williams, L. Oliker, J. Shalf, K. Yelick,
"Implicit and Explicit Optimizations for Stencil Computations",
Memory System Performance and Correctness (MSPc), 2006.
[pdf]
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S. Williams, J. Shalf, L. Oliker, S. Kamil, P. Husbands, K. Yelick,
"The Potential of the Cell Processor for Scientific Computing",
ACM International Conference on Computing Frontiers, 2006.
Highest ranked conference paper
[pdf]
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S. Williams, J. Shalf, L. Oliker, P. Husbands, K. Yelick,
"Dense and Sparse Matrix Operations on the Cell Processor",
Lawrence Berkeley National Laboratory, Paper LBNL-58253, 2005
http://repositories.cdlib.org/lbnl/LBNL-58253
[pdf]
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J. Gebis, S. Williams, D. Patterson, C. Kozyrakis,
"VIRAM1: A Media-Oriented Vector Processor with Embedded DRAM",
Design Automation Conference (DAC), 2004.
[pdf]
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S. Williams,
"Verification of VIRAM1",
Masters Thesis, 2003.
[pdf]
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C. Kozyrakis, D. Judd, J. Gebis, S. Williams, D. Patterson, K. Yelick,
"Hardware/Compiler Co-development for an Embedded Media Processor",
Proceedings of the IEEE, 2001.
[pdf]
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"The Roofline Model: A Pedagogical Tool for Auto-tuning Kernels on Multicore Architectures.",
Hot Chips 20, 2008.
slides: [pdf] [ppt]
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"PERI: Auto-tuning Memory Intensive Kernels for Multicore",
SciDAC PI Meeting, 2008.
slides: [pdf] [ppt]
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"The Roofline Model: A Pedagogical Tool for Program Analysis and Optimization",
ParLab Summer Retreat, 2008.
slides: [pdf] [ppt]
Roofline poster: [pdf]
Structured Grids poster: [pdf]
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"Lattice Boltzmann Simulation Optimization on Leading Multicore Platforms",
International Parallel & Distributed Processing Symposium (IPDPS), 2008.
slides: [pdf] [ppt]
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"Autotuning Scientific Kernels on Multicore Systems",
ASCR PI Meeting, 2008.
poster: [pdf] (presented by Leonid Oliker)
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"Autotuning Sparse and Structured Grid Kernels",
ParLab Winter Retreat, 2008.
slides: [pdf] [ppt]
SpMV poster: [pdf]
Structured Grids poster: [pdf]
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"Optimization of Sparse Matrix-Vector Multiplication on Emerging Multicore Platforms",
DOE/DOD Workshop on Emerging High Performance Architectures and Applications, 2007.
slides: [pdf] [ppt]
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"Optimization of Sparse Matrix-Vector Multiplication on Emerging Multicore Platforms",
Supercomputing (SC), 2007.
slides: [pdf] [ppt]
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"Tuning Sparse Matrix Vector Multiplication for multi-core SMPs",
ParLab Seminar, 2007.
slides: [pdf] [ppt]
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"Tuning Sparse Matrix Vector Multiplication for multi-core processors",
Center for Scalable Application Development Software (CScADS), 2007.
slides: [pdf] [ppt]
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"Structured Grids and Sparse Matrix Vector Multiplication on the Cell Processor",
Global Signal Processing Expo (GSPx), 2006.
slides: [pdf] [ppt]
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"3D Lattice Boltzmann Magneto-hydrodynamics (LBMHD3D)",
UTK Summit on Software and Algorithms for the Cell Processor, 2006.
slides: [pdf] [ppt]
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"The Potential of the Cell Processor for Scientific Computing",
presented at Transmeta, 2006.
slides: [ppt]
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"The Potential of the Cell Processor for Scientific Computing",
EDGE workshop on new commodity architectures, 2006.
poster: [poster handout]
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"The Potential of the Cell Processor for Scientific Computing",
LBNL Scientific Computing Seminar, 2006.
slides: [pdf]
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"Vector IRAM: A media-oriented vector processor with embedded DRAM",
Hot Chips 12, 2000.
slides: [pdf] (presented by Christos Kozyrakis)
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